Non-volatile data storage devices, such as universal serial bus (USB) flash memory devices or removable storage cards, have allowed for increased portability of data and software applications. Flash memory devices can enhance data storage density by storing multiple bits in each flash memory cell. For example, Multi-Level Cell (MLC) flash memory devices provide increased storage density by storing 3 bits per cell, 4 bits per cell, or more. Although increasing the number of bits per cell and reducing device feature dimensions may increase a storage density of a memory device, a bit error rate of data stored at the memory device may also increase.
Error correction coding (ECC) is often used to correct errors that occur in data read from a memory device. Prior to storage, data may be encoded by an ECC encoder to generate redundant information (e.g. “parity bits”) that may be stored with the data. For example, an ECC may be based on algebraic codes, such as a Hamming coding scheme, a Reed-Solomon (RS) encoding scheme, or a Bose Chaudhuri Hocquenghem (BCH) coding scheme, or based on iterative coding schemes, such as a Turbo Code coding scheme or a Low-Density Parity Check (LDPC) coding scheme.
An efficiency of an ECC scheme may be measured based on various aspects. For example, efficiency may be measured based on error correction capability as compared to redundancy, such as an amount of errors that can be corrected with a given amount of redundancy, or an amount of redundancy for correction of data subject to errors due to a particular error rate. Alternatively or additionally, efficiency may be measured at least partially based on complexity of an ECC engine (e.g. a size or cost of an ECC core), power consumption of the ECC engine, or decoding throughput and latency. For example, random read performance is improved with increases in throughput and decreases in latency, such as in solid-state drive (SSD) and memory card for mobile device applications.